Cisc And Risc Processor Technologies Essay, Research Paper TABLE OF CONTENTS 1. Abstract 2 2. Introduction 3 3. CISC Technology 4 3.1 Characteristics 4
Cisc And Risc Processor Technologies Essay, Research Paper
TABLE OF CONTENTS
1. Abstract 2
2. Introduction 3
3. CISC Technology 4
3.1 Characteristics 4
3.2 The Advantages of CISC 5
3.3 The Disadvantages of CISC 5
4. RISC Technology 6
4.1 Characteristics 6
4.2 The Advantages of RISC 7
4.3 The Disadvantages of RISC 8
5. Conclusion 9
6. References 10
This report describes the CISC and RISC technologies. Describes the characteristics of each of these technologies. Also Advantages and disadvantages of both technologies are described. So the reader will be able to recognize and compare both technologies.
This report describes the “CISC” style of computer processor architecture. Which is the most commonly used style today. By reading this report you will be able to define the term CISC. Be able to list the characteristics of a CISC instruction set and also the decisions and philosophies which led to the development for this technology.
Also this report describes the RISC style of computer processor architecture. Which is replacing CISC in some uses. Define the term RISC. Describe the characteristics of RISC technology. And also point the advantages and disadvantages of using this technology.
At the end of this report you will also be able to describe the major differences between a CISC instruction set and a RISC instruction set and list some key advantages and disadvantages of RISC as compared to CISC
Speeding up a computer system involves many different strategies. By speeding up the input and output devices in different peripherals. But the most fruitful place to speed up the system is by designing a faster processor. This report will explain “CISC” and “RISC” technologies and show how computer designers have tried to do speed up processors by implementing these tow technologies.
CISC technology was not known as a processor technology back in time. It was just the way that manufactures designed processors. So the Term CISC was define just when the RISC philosophy was adopted.
In the mid-1970 s advances in technology began to reduce the difference in speed between main memory and processor chips. As memory speed increased, and high level languages displaces assembly language the major reasons for Complex Instruction Set Computers began to disappear and computer designers began to look in at ways computer performance could be optimized beyond just making faster hardware. That is when RISC technology started to emergence.
3. CISC Technology
CISC as defined by [WISCISC1] stands for Complex Instruction Set Computer, is a philosophy for designing chips that are easy to program and which make efficient use of memory. Each instruction in a CISC instruction set might perform a series of operations inside the processor. This reduces the number of instructions required to implement a given program, and allows the programmer to learn a small but flexible set of instructions.
Since the earliest machines were programmed in assembly language and memory was slow and expensive, the CISC philosophy made sense, and was commonly implemented in large computer systems.
Most common microprocessor designs including the Intel 80×86 and Motorola 68K series also follow the CISC philosophy.
As we shall see, recent changes in software and hardware technology have forced a re-examination of CISC.
The three decisions that led to the CISC philosophy, which drove all computer designs until the late 1980s, and is still in major use today.
Build of rich instruction sets
Build of high-level instruction sets
3.2 The Advantages of CISC
At the time of their initial development, CISC machines used available technologies to optimize computer performance.
Microprogramming is as easy as assembly language to implement, and much less expensive than hardwiring a control unit.
The ease of micro coding new instructions allowed designers to make CISC machines upwardly compatible: a new computer could run the same programs as earlier computers because the new computer would contain a superset of the instructions of the earlier computers.
As each instruction became more capable, fewer instructions could be used to implement a given task. This made more efficient use of the relatively slow main memory.
Because micro program instruction sets can be written to match the constructs of high-level languages, the compiler does not have to be complicated.
3.3 The Disadvantages of CISC
Still, designers soon realized that the CISC philosophy had its own problems, including:
Earlier generations of a processor family generally were contained as a subset in every new version so instruction set & chip hardware become more complex with each generation of computers.
So that as many instructions as possible could be stored in memory with the least possible wasted space, individual instructions could be of almost any length. This means that different instructions will take different amounts of clock time to execute, slowing down the overall performance of the machine.
Many specialized instructions aren’t used frequently to justify their existence. Approximately 25% of the available instructions are used in a typical program.
CISC instructions typically set the condition codes as a side effect of the instruction. Not only does setting the condition code takes time, but also programmers have to remember to examine the condition code bits before a subsequent instruction changes them.
Next RISC is described and how a re-examination of the processor design decisions, which led to CISC computers, produced a new technology of computer design the RISC.
4. RISC Technology
As defined by [WISRISC1] RISC (reduced instruction set computer) is a microprocessor that is designed to perform a smaller number of types of computer instructions so that it can operate at a higher speed (perform more MIPS, or millions of instructions per second). Since each instruction type that a computer must perform requires additional transistors and circuitry, a larger list or set of computer instructions tends to make the microprocessor more complicated and slower in operation.
John Cocke of IBM Research in Yorktown, New York, originated the RISC concept in 1974 by proving that about 20% of the instructions in a computer did 80% of the work. The first computer to benefit from this discovery was in 1980. Later other Systems made use of the idea.
The term itself (RISC) is credited to David Petersen, a teacher at the University of California in Berkeley. The concept was used in Sun Microsystems’ SPARC microprocessors and led to the founding of what is now MIPS Technologies, part of Silicon Graphics.
Simple instruction set.
In a RISC machine, the instruction set contains simple, basic instructions, from which more complex instructions can be composed.
Same length instructions.
Each instruction is the same length, so that it may be fetched in a single operation.
1 machine-cycle instructions.
Most instructions complete in one machine cycle, which allows the processor to handle several instructions at the same time. This pipelining is a key technique used to speed up RISC machines.
4.2 The Advantages of RISC
Implementing a processor with a simplified instruction set design provides several advantages over implementing a comparable CISC design:
Since a simplified instruction set allows for a pipelined, super scalar design RISC processors often achieve 2 to 4 times the performance of CISC processors using comparable semiconductor technology and the same clock rates.
1. Simpler hardware
Because the instruction set of a RISC processor is so simple, it uses up much less chip space; extra functions, such as memory management units or floating point arithmetic units, can also be placed on the same chip. Smaller chips allow a semiconductor manufacturer to place
more parts on a single silicon wafer, which can lower the per-chip cost dramatically.
1. Shorter design cycle
Since RISC processors are simpler than corresponding CISC processors, they can be designed more quickly, and can take advantage of other technological developments sooner than corresponding CISC designs, leading to greater leaps in performance between generations.
4.3 The Disadvantages of RISC
The transition from a CISC design strategy to a RISC design strategy isn’t without its problems. Software engineers should be aware of the key issues, which arise when moving code from a CISC processor to a RISC processor.
1. Code Quality
The performance of a RISC processor depends greatly on the code that it is executing. If the programmer (or compiler) does a poor job of instruction scheduling, the processor can spend quite a bit of time stalling (waiting for the result of one instruction before it can proceed with a subsequent instruction). This makes the performance of a RISC application depend critically on the quality of the code generated by the compiler.
Unfortunately, instruction scheduling can make debugging difficult. If scheduling (and other optimizations) is turned off, the machine-language instructions show a clear connection with their corresponding lines of source. However, once instruction scheduling is turned on, the machine language instructions for one line of source may appear in the middle of the instructions for another line of source code. Such an intermingling of machine language instructions not only makes the code hard to read, it can also defeat the purpose of using a source-level compiler, since single lines of code can no longer be executed by themselves.
3. Code expansion
Since CISC machines perform complex actions with a single instruction, where RISC machines may require multiple instructions for the same action, code expansion can be a problem. Code expansion refers to the increase in size that you get when you take a program that had been compiled for a CISC machine and re-compile it for a RISC machine.
4. System Design
Another problem that faces RISC machines is that they require very fast memory systems to feed them instructions. RISC-based systems typically contain large memory caches, usually on the chip itself. This is known as a first-level cache.
As we have seen, Reduced Instruction Set Computing (RISC) is an evolution in computer architectures that emphasizes speed and cost-effectiveness over ease of assembly-language programming and the conservation of memory. In addition, RISC-based designs will continue to grow in speed and ability much more rapidly than comparable CISC designs over the next several years. These factors make RISC an irresistible choice for future product lines. Yet, since customers have a sizable investment in hardware and software, compatibility is a key word among engineers.
Placing a RISC microprocessor into a system takes workstation performance at personal computer prices. This is very important in today’s highly competitive market
This extra power doesn’t have to raise the cost of the machine. Since the RISC designs get their speed from their simplicity, the manufacturing costs for the processors are lower.
CISC and RISC technologies are not the end.
As found in [EFRONT] new processor like Itanioum will bring new levels of function and processing power to work stations and servers.
Hewlett Packard has provided Intel with innovative new instruction sets while Intel has provided the architecture and processor technology.
Using explicit a new architecture named EPIC (Explicitly Parallel Instruction Computing) based on research and old architecture, the chip is able to process requests faster by taking the mispredictions out of computations. This next generation of technology will supercede the current RISC and CISC technologies today.
[EFRONT] Aaron Dobbins Itanium: 64-bit Processing Arrives
December 7th, 1999
[WISCISC1] whatis.com authors What is CISC
[WISRISC1] whatis authors What is RISC
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